System, method, and computer program product for automatically selecting a constraint solver algorithm in a design verification environment
US9477800B1 · kind B1 · utility
0Cited by
7References
17Claims
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Key dates
| Filing date | Feb 11, 2015 |
| Grant date | Oct 25, 2016 |
| Priority date | — |
| Expiry date | Feb 11, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a computer-implemented method for electronic design verification. Embodiments may include providing, using one or more processors, an electronic design verification environment having a plurality of randomize calls associated therewith. Embodiments can also include selecting one of the plurality of randomize calls for analysis at a constraint solver engine and iteratively analyzing the selected randomize call using a plurality of constraint solver algorithms. Embodiments can also include automatically determining a most effective constraint solver algorithm for the selected randomize call.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.