Semiconductor device and method of forming topside and bottom-side interconnect structures around core die with TSV
US9478486B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 2014 |
| Grant date | Oct 25, 2016 |
| Priority date | — |
| Expiry date | May 1, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a core semiconductor device with a through silicon via (TSV). The core semiconductor device includes a plurality of stacked semiconductor die and semiconductor component. An insulating layer is formed around the core semiconductor device. A conductive via is formed through the insulating layer. A first interconnect structure is formed over a first side of the core semiconductor device. The first interconnect structure is electrically connected to the TSV. A second interconnect structure is formed over a second side of the core semiconductor device. The second interconnect structure is electrically connected to the TSV. The first and second interconnect structures include a plurality of conductive layers separated by insulating layers. A semiconductor die is mounted to the first interconnect structure. The semiconductor die is electrically connected to the core semiconductor device through the first and second interconnect structures and TSV.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.