Electrode-aligned selective epitaxy method for vertical power devices
US9478639B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2015 |
| Grant date | Oct 25, 2016 |
| Priority date | — |
| Expiry date | Feb 27, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02639
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming trench electrode structures includes forming a first dielectric layer on a semiconductor substrate, forming a second layer above the first dielectric layer and forming an opening which extends through the second layer and the first dielectric layer to the semiconductor substrate such that part of the semiconductor substrate is uncovered. The method further comprises forming an epitaxial layer on the uncovered part of the semiconductor substrate, removing the second layer after forming the epitaxial layer and filling an open space formed by removing the second layer with an electrically conductive material. The electrically conductive material forms an electrode which is laterally surrounded by the epitaxial layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.