Emitter follower buffer with reverse-bias protection
US9479155B2 · kind B2 · utility
0Cited by
6References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 3, 2013 |
| Grant date | Oct 25, 2016 |
| Priority date | — |
| Expiry date | Jul 3, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/294
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention relates to a buffer circuit for a receiver device including a transconductance stage and an output stage coupled in parallel to output stages of other channels of the device. The output of the transconductance stage is connected to a base of a bipolar transistor in the output stage. A switch is connected between the base of the bipolar transistor and the emitter of the bipolar transistor. A controller is arranged to switch the buffer circuit from a switch-off mode to a switch-on mode and back. In switch-off mode the switch is switched on, so as to connect the base and the emitter of the bipolar transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.