Communicating prefetchers that throttle one another
US9483406B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2014 |
| Grant date | Nov 1, 2016 |
| Priority date | — |
| Expiry date | Apr 24, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor includes a first hardware data prefetcher that prefetches data into the microprocessor according to a first algorithm. The microprocessor also includes a second hardware data prefetcher that prefetches data into the microprocessor according to a second algorithm, wherein the first and second algorithms are different. The second prefetcher detects that it is prefetching data into the microprocessor according to the second algorithm in excess of a first predetermined rate and, in response, sends a throttle indication to the first prefetcher. The first prefetcher prefetches data into the microprocessor according to the first algorithm at below a second predetermined rate in response to receiving the throttle indication from the second prefetcher.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.