Method of manufacturing semiconductor device
US9484249B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2016 |
| Grant date | Nov 1, 2016 |
| Priority date | — |
| Expiry date | Mar 2, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/20
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A technique capable of suppressing a variation in a characteristic of a semiconductor device includes: (a) polishing a substrate including: a first insulating film having a first groove; and a first metal film formed in the first groove and on the first insulating film; (b) forming a second insulating film on the substrate after performing (a); (c) polishing the second insulating film; (d) measuring a thickness distribution of the second insulating film on the substrate after performing (c); and (e) forming a third insulating film having a thickness distribution different from that of the second insulating film measured in (d) to compensate for a thickness distribution of a stacked insulating film including the second insulating film and the third insulating film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.