Semiconductor isolation structure and manufacturing method thereof
US9484376B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 30, 2014 |
| Grant date | Nov 1, 2016 |
| Priority date | — |
| Expiry date | May 30, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/8063
Abstract
The present disclosure provides a method for manufacturing a semiconductor isolation structure, including providing a substrate with a top surface; forming a patterned mask over the top surface; forming a trench through the patterned mask in the substrate by a directional etch comprising nitrogen-containing substance, wherein an aspect ratio of the trench is formed to be greater than about 18, and a ratio of a width of a narrowest portion and a width of a widest portion of the isolation region is formed to be greater than about 0.7; and filling the trench with insulating materials. The present disclosure also provides an image sensing device, including a radiation sensing region with a first isolation region separating adjacent radiation detecting units and a peripheral region, wherein an aspect ratio of the first isolation region is greater than about 18.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.