Patent · US Active

Method and apparatus for clock frequency ratio independent error logging

US9489008B2 · kind B2 · utility

0Cited by

2References

14Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Ming Yi Lim · Air Itam, MY
Su Wei Lim · Klang, MY
Poh Thiam Teoh · Bandar Baru Sungai Buloh, MY

Key dates

Filing date	Dec 22, 2011
Grant date	Nov 8, 2016
Priority date	—
Expiry date	Sep 13, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG06F13/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method and system for error logging that is independent of the clock frequency ratio in an I/O subsystem. In one embodiment of the invention, the I/O subsystem has an error logging mechanism with a fixed queue depth of two and is independent of the clock frequencies in the I/O subsystem. The I/O subsystem has two queue entries for storing or logging the uncorrectable errors. In one embodiment of the invention, the I/O subsystem has two queue entries for storing or logging the 128-bit TLP Header and the First Error Pointer (FEP) of the uncorrectable errors detected in the I/O subsystem.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.