Multi domain bridge with auto snoop response
US9489307B2 · kind B2 · utility
2Cited by
8References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2013 |
| Grant date | Nov 8, 2016 |
| Priority date | — |
| Expiry date | Apr 9, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An asynchronous dual domain bridge is implemented between the cache coherent master and the coherent system interconnect. The bridge has 2 halves, one in each clock/powerdown domain—master and interconnect. The powerdown mechanism is isolated to just the asynchronous bridge implemented between the master and the interconnect with a basic request/acknowledge handshake between the master subsystem and the asynchronous bridge.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.