Semiconductor memory device and method of operating the same
US9490013B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 17, 2016 |
| Grant date | Nov 8, 2016 |
| Priority date | — |
| Expiry date | Mar 17, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/4402
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The semiconductor memory device includes a memory cell array including guarantee blocks, normal blocks, and redundancy blocks. A bad block address indicates which block from the guarantee blocks and the normal blocks is defective, and an indication information indicates whether the bad block address belongs to the guarantee blocks or to the normal blocks. A request block address is supplied together with associated block type information. The block type information indicates whether the request block address belongs to the guarantee blocks or to the normal blocks. A match signal is enabled when the block type information matches the indication information, and the request block address matches the bad block address. The enablement of the match signal allows the defective block to be replaced with one block from the redundancy blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.