Method and structure for FinFET isolation
US9490176B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2014 |
| Grant date | Nov 8, 2016 |
| Priority date | — |
| Expiry date | Dec 22, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
Abstract
A semiconductor device with effective FinFET isolation and method of forming the same are disclosed. The method includes receiving a substrate having an active fin, a plurality of dummy gate stacks over the substrate and engaging the fin, and first dielectric features over the substrate and separating the dummy gate stacks. The method further includes removing the dummy gate stacks thereby forming a first trench and a second trench that expose first and second portions of the active fin respectively. The method further includes removing the first portion of the active fin and forming a gate stack in the second trench, the gate stack engaging the second portion of the active fin. The method further includes filling the first trench with a second dielectric material that effectively isolates the second portion of the active fin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.