Compute intensive module packaging

US9490188B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Amilcar R. Arvelo · Poughkeepsie, US
• Michael J. Ellsworth, Jr. · Poughkeepsie, US
• Eric J. McKeever · Poughkeepsie, US
• Thong N. Nguyen · Wappingers Falls, US
• Edward J. Seminaro · Milton, US

Key dates

• Filing date: Sep 12, 2014
• Grant date: Nov 8, 2016
• Expiry date: Sep 12, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A package for a multi-chip module includes a top cold plate and a bottom plate whose perimeters are in thermal communication so the plates together completely encase the module except for a connector passing through the bottom plate. The cold plate has copper tubing pressed into a groove formed in a serpentine pattern. The perimeter of the cold plate has thermal conduction fins which mate with thermal conduction slots in the perimeter of the bottom plate. Thermal interface material is disposed in gaps between the plates and chips on the module, the gaps having dimensions controlled by support ribs of plates which abut the module substrate. The cold plate is used on the hottest side of the module, e.g., the side having computationally-intensive chips such as ASICs. A densely packed array of these packages can be used in a central electronic complex drawer with a shared coolant circulation system.