Three dimensional strained semiconductors
US9490318B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2013 |
| Grant date | Nov 8, 2016 |
| Priority date | — |
| Expiry date | Jun 7, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/221
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one embodiment, an apparatus includes a three dimensional structure comprising a semiconductor material, and at least one thin film in contact with at least one exterior surface of the three dimensional structure for inducing a strain in the structure, the thin film being characterized as providing at least one of: an induced strain of at least 0.05%, and an induced strain in at least 5% of a volume of the three dimensional structure. In another embodiment, a method includes forming a three dimensional structure comprising a semiconductor material, and depositing at least one thin film on at least one surface of the three dimensional structure for inducing a strain in the structure, the thin film being characterized as providing at least one of: an induced strain of at least 0.05%, and an induced strain in at least 5% of a volume of the structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.