Dynamic voltage frequency scaling

US9495497B1 · kind B1 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Nathan C. Buck · Underhill, US
• Eric A. Foreman · Saint Albans, US
• Jeffrey G. Hemmett · South Burlington, US
• Kerim Kalafala · Rhinebeck, US
• Gregory M. Schaeffer · Poughkeepsie, US
• Stephen G. Shuma · Underhill, US
• Natesan Venkateswaran · Hopewell Junction, US
• Chandramouli Visweswariah · Croton-on-Hudson, US
• Michael H. Wood · Detroit, US
• Vladimir Zolotov · Putnam Valley, US

Key dates

• Filing date: Dec 7, 2015
• Grant date: Nov 15, 2016
• Expiry date: Dec 7, 2035

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2119/12
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A method, system, and computer program product to perform dynamic voltage frequency scaling of an integrated circuit include performing statistical timing analysis using a canonical form of a clock, the canonical form of the clock being a function of variability in voltage. Obtaining a canonical model expressing timing slack at each test location of the integrated circuit is as a function of one or more sources of variability, one of the one or more sources of variability being voltage, and performing the dynamic voltage-frequency scaling based on selecting at least one of a clock period and the voltage using the canonical model.