Vertical transistor device with halo pocket contacting source
US9496390B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2013 |
| Grant date | Nov 15, 2016 |
| Priority date | — |
| Expiry date | Jul 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26586
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A vertical transistor device comprises a substrate, a first source, a drain, a first gate dielectric layer, a first gate electrode and a first doping region. The substrate has at least one protruding portion. The first source having a first conductivity type is formed on the substrate. The drain having the first conductivity type is disposed on the protruding portion. The first gate electrode is disposed adjacent to a first sidewall of the protruding portion. The first gate dielectric layer is disposed between the first gate electrode and the first sidewall as well as being disposed adjacent to the first source and the drain. The first doping region having a second conductivity type is formed beneath the protruding portion and adjacent to the first source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.