Semiconductor device and method of manufacturing the same
US9496403B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2012 |
| Grant date | Nov 15, 2016 |
| Priority date | — |
| Expiry date | May 16, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A circuit including an inverter is provided for a wiring layer. A semiconductor device is provided with a wiring layer circuit which is formed over an insulating film and includes at least one inverter element. The inverter is provided with a first transistor element and a resistance element which is connected to the first transistor via a connection node. The first transistor element is provided with a gate electrode which is embedded in an interlayer insulating film including the insulating film, a gate insulating film which is formed over the interlayer insulating film and the gate electrode, and a first semiconductor layer which is formed over the gate insulating film between a source electrode and a drain electrode. The resistance element is provided with a second semiconductor layer which functions as a resistance. The first semiconductor layer and the second semiconductor layer are formed in the same layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.