Patent · US Active

Integrated circuit with a sidewall layer and an ultra-thick metal layer and method of making

US9502346B2 · kind B2 · utility

0Cited by
1References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 16, 2013
Grant dateNov 22, 2016
Priority date—
Expiry dateAug 16, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An integrated circuit that includes a substrate, a metal layer over the substrate and a first dielectric layer over the metal layer. The first dielectric layer includes a via. A sidewall layer that includes a silicon compound is in the via. A second dielectric layer is over the sidewall layer and an ultra-thick metal (UTM) layer is in the via.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.