Semiconductor device and method of manufacturing the same
US9502425B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 2014 |
| Grant date | Nov 22, 2016 |
| Priority date | — |
| Expiry date | Nov 4, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The inventive concepts provide semiconductor devices and methods of manufacturing the same. One semiconductor device includes a substrate, a device isolation layer disposed on the substrate, a fin-type active pattern defined by the device isolation layer and having a top surface higher than a top surface of the device isolation layer, a first conductive line disposed on an edge portion of the fin-type active pattern and on the device isolation layer adjacent to the edge portion of the fin-type active pattern, and an insulating thin layer disposed between the fin-type active pattern and the first conductive line. The first conductive line forms a gate electrode of an anti-fuse that may be applied with a write voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.