Oscillator circuit and method of generating a clock signal

US9507373B2 · kind B2 · utility

Assignee

• Freeescale Semiconductor, Inc. · US

Inventors

• Hubert M. Bode · Haar, DE
• Dirk Wendel · Unterhaching, DE

Key dates

• Filing date: Jul 4, 2013
• Grant date: Nov 29, 2016
• Expiry date: Jul 4, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K3/0231
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

An oscillator circuit of the type comprising a flip-flop for generating a clock signal and two comparators for comparing a reference voltage with the voltage across a first capacitor which is charged during a first cycle of the clock signal and the voltage across a second capacitor which is charged during a second cycle of a clock signal provides a means for removing the effects of any offset in either comparator. This is achieved by reversing the inputs of the comparators for each cycle of the output frequency. Thus an offset in a comparator which would increase the clock period on one cycle will reduce the period of the next cycle by the same amount. As a net result, the period of time over two clock periods will stay constant regardless of any offset drift in a comparator.