Storage module and method for determining ready/busy status of a plurality of memory dies
US9507704B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2014 |
| Grant date | Nov 29, 2016 |
| Priority date | — |
| Expiry date | Aug 22, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A storage module and method are provided for determining ready/busy status of a plurality of memory dies. In one embodiment, a bus has a ready/busy line that is shared among the plurality of memory dies, and a time-division multiplex signal on the shared ready/busy line is used to communicate the ready/busy status of each of the memory dies. In another embodiment, each of the memory dies sends its ready/busy status to the storage controller using a different one of a plurality of data lines in the bus. In yet another embodiment, each of the memory dies sends a pulse across the ready/busy line with a different pulse width. To avoid collisions, each memory die waits a different number of clock cycles before attempting to send its pulse status after determining that the shared ready/busy line is in use.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.