Semiconductor package structure having hollow chamber and bottom substrate and package process thereof
US9508676B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2015 |
| Grant date | Nov 29, 2016 |
| Priority date | — |
| Expiry date | Sep 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/165
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package structure having hollow chamber includes a bottom substrate having a bottom baseboard and a bottom metal layer formed on a disposing area of the bottom baseboard, a connection layer formed on the bottom metal layer, and a top substrate. The bottom metal layer has at least one corner having a first and a second outer lateral surface, and an outer connection surface. A first extension line is formed from a first extreme point of the first outer lateral surface, and a second extension line is formed from a second extreme point of the second outer lateral surface. A first exposing area of the bottom baseboard is formed by connecting the first and second extreme points and a cross point of the first and second extreme points. The top substrate connects to the connection layer to form a hollow chamber between the top and bottom substrates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.