Vertical MOS semiconductor device for high-frequency applications, and related manufacturing process
US9508846B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2015 |
| Grant date | Nov 29, 2016 |
| Priority date | — |
| Expiry date | Apr 30, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A MOS semiconductor device of a vertical type has: a functional layer, having a first type of conductivity; gate structures, which are formed above the functional layer and have a region of dielectric material and an electrode region; body wells, which have a second type of conductivity, are formed within the functional layer, and are separated by a surface separation region; source regions, which have the first type of conductivity and are formed within the body wells. Each gate structure extends laterally above just one respective body well and does not overlap the surface separation region of the functional layer. The device may further have: at least one shield structure, arranged between adjacent gate structures above the surface separation region; and/or at least one doped control region, having the second type of conductivity, arranged within the surface separation region, which are both set at the source potential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.