Patent · US Active

Dual sigma-delta analog-to-digital converter

US9509332B1 · kind B1 · utility

9Cited by
7References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 6, 2015
Grant dateNov 29, 2016
Priority date
Expiry dateNov 6, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M3/472
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A sigma-delta (ΣΔ) analog-to-digital converter (ADC) comprises a main ΣΔ modulator configured to receive an analog input signal at a main ΣΔ modulator input and to provide a main digital output signal representative of the analog input signal and an auxiliary ΣΔ modulator configured to receive an auxiliary input signal at an auxiliary ΣΔ modulator input and to provide an auxiliary digital output signal, wherein the ΣΔ ADC comprises a shared integrator stage, the shared integrator stage is configured to be used by the main ΣΔ modulator and the auxiliary ΣΔ modulator, wherein, alternatingly, the shared integrator stage is selectively communicatively coupled to receive the analog input signal when configured to be used by the main ΣΔ modulator and selectively communicatively coupled to receive the auxiliary input signal when configured to be used by the auxiliary ΣΔ modulator.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.