Contention management for a hardware transactional memory
US9513959B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Apr 24, 2008 |
| Grant date | Dec 6, 2016 |
| Priority date | — |
| Expiry date | Feb 29, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/528
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A hardware transactional memory 12, 14, 16, 18, 20 is provided within a multiprocessor 4, 6, 8, 10 system with coherency control and hardware transaction memory control circuitry 22 that serves to at least partially manage the scheduling of processing transactions in dependence upon conflict data 26, 28, 30. The conflict data characterizes previously encountered conflicts between processing transactions. The scheduling is performed such that a candidate processing transaction will not be scheduled if the conflict data indicates that one of the already running processing transactions has previously conflicted with the candidate processing transaction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.