Non-volatile static RAM and method of operation thereof
US9514816B1 · kind B1 · utility
15Cited by
12References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2015 |
| Grant date | Dec 6, 2016 |
| Priority date | — |
| Expiry date | Sep 24, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device and array which includes a static random access memory (SRAM) circuit coupled to a non-volatile circuit, such as a ferroelectric-RAM (F-RAM) circuit, in which the F-RAM circuit stores a bit of data from the SRAM circuit during power-out periods, the F-RAM circuit is further coupled to bit-line(s) to output the bit of data stored in the F-RAM circuit when operation power is restored.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.