Backside contact to final substrate
US9514987B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2015 |
| Grant date | Dec 6, 2016 |
| Priority date | — |
| Expiry date | Jun 19, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/68368
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Device structures and fabrication methods for a backside contact to a final substrate An electrically-conducting connection is formed that extends through a device layer of a silicon-on-insulator substrate and partially through a buried insulator layer of the silicon-on-insulator substrate. After the electrically-conducting connection is formed, a handle wafer of the silicon-on-insulator substrate is removed. After the handle wafer is removed, the buried insulator layer is partially removed to expose the electrically-conducting connection. After the buried insulator layer is partially removed, a final substrate is coupled to the buried insulator layer such that the electrically-conducting connection is coupled with the final substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.