Method of manufacturing a FinFET device having a stepped profile
US9514991B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2015 |
| Grant date | Dec 6, 2016 |
| Priority date | — |
| Expiry date | Oct 13, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A FinFET device and a method for fabricating a FinFET device are disclosed. An exemplary method of fabricating a FINFET device includes providing a substrate including a fin structure including a plurality of fins and shallow trench isolation (STI) features between each fin of the fin structure. A first gate structure is formed over the fin structure. First gate spacers are formed on sidewalls of the first gate structure. The first gate spacers are removed while leaving portions of the first gate spacers within corners where the fin structure and the first gate structure meet. Second gate spacers are formed on sidewalls of the first gate structure. A dielectric layer is formed over the fin structure, the first gate structure, and the second gate spacers. The first gate structure and the portions of the first gate spacers are removed, thereby exposing sidewalls of the second gate spacers. A second gate structure is formed over the fin structure in a region where the first gate structure and the portions of the first gate spacers have been removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.