Method for fabricating ferroelectric random-access memory on pre-patterned bottom electrode and oxidation barrier
US9515075B1 · kind B1 · utility
2Cited by
19References
20Claims
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Key dates
| Filing date | Mar 9, 2016 |
| Grant date | Dec 6, 2016 |
| Priority date | — |
| Expiry date | Mar 9, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/696
Abstract
Structure and method of fabrication of F-RAM cells are described. The F-RAM cell include ferroelectric capacitors forming over and with a pre-patterned barrier structure which has a planarized/chemically and/or mechanically polished top surface. The pre-patterned barrier structure includes multiple oxygen barriers having a structure of a bottom electrode layer over an oxygen barrier layer. The bottom electrode layer forms at least a part of the bottom electrode of the ferroelectric capacitor formed thereon.
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