Apparatus, system, and method for destaging cached data
US9519540B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 24, 2012 |
| Grant date | Dec 13, 2016 |
| Priority date | — |
| Expiry date | Jun 10, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L67/1097
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus, system, and method are disclosed for satisfying storage requests while destaging cached data. A monitor module samples a destage rate for a nonvolatile solid-state cache, a total cache write rate for the cache, and a dirtied data rate. The dirtied data rate comprises a rate at which write operations increase an amount of dirty data in the cache. A target module determines a target cache write rate for the cache based on the destage rate, the total cache write rate, and the dirtied data rate to target a destage write ratio. The destage write ratio comprises a predetermined ratio between the dirtied data rate and the destage rate. A rate enforcement module enforces the target cache write rate such that the total cache write rate satisfies the target cache write rate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.