Memory controller, method of operating the same and memory system including the same
US9519576B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2013 |
| Grant date | Dec 13, 2016 |
| Priority date | — |
| Expiry date | Feb 25, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7205
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller controlling a nonvolatile memory device having a plurality of memory blocks as a data storage space includes an error detection and correction circuit and a reclaim control unit. The error detection and correction circuit receives data from a memory block and calculates a comparison result by comparing a bit error rate of the received data and a predetermined value. The reclaim control unit determines whether or not to perform a read reclaim operation depending on the comparison result and a read voltage used to read the data. The read reclaim operation copies the data to a memory block different from a memory block having stored the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.