Silicon designs for high voltage isolation
US9520354B1 · kind B1 · utility
3Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2015 |
| Grant date | Dec 13, 2016 |
| Priority date | — |
| Expiry date | Jul 29, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/33523
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An isolation system, isolation capacitor, and Integrated Circuit are disclosed. The isolation capacitor is described to include a first capacitive element, a second capacitive element, a primary isolation layer positioned between the first and second capacitive elements, as well as a secondary isolation layer positioned between the first and second capacitive elements. The secondary isolation layer has an area that is larger than an area of one or both of the first and second capacitive elements, thereby reducing the likelihood of breakdown between the first and second capacitive elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.