Patent · US Active

Silicon based nanoscale crossbar memory

US9520557B2 · kind B2 · utility

5Cited by
61References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 17, 2015
Grant dateDec 13, 2016
Priority date
Expiry dateSep 17, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2213/81
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The present application describes a crossbar memory array. The memory array includes a first array of parallel nanowires of a first material and a second array of parallel nanowires of a second material. The first and the second array are oriented at an angle with each other. The array further includes a plurality of nanostructures of non-crystalline silicon disposed between a nanowire of the first material and a nanowire of the second material at each intersection of the two arrays. The nanostructures form a resistive memory cell together with the nanowires of the first and second materials.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.