Integrated circuit device and method of performing self-testing within an integrated circuit device

US9529047B2 · kind B2 · utility

Assignee

• Freeescale Semiconductor, Inc. · US

Inventors

• Markus Regner · Munich, DE
• Heiko Ahrens · Munich, DE
• Vladimir Vorisek · Forstinning, DE

Key dates

• Filing date: Aug 26, 2014
• Grant date: Dec 27, 2016
• Expiry date: May 23, 2035

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/318536
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

IC device comprising a plurality of functional components arranged into self-test cells. The IC device is configurable into a first self-test configuration comprising a first set of self-test partitions. Each self-test partition within the first set comprising at least one self-test cell. Functional components of the self-test cell(s) of each self-test partition within the first set are arranged to be configured into at least one scan-chain for said self-test partition when the IC device is configured into the first self-test configuration. The IC device is configurable into a second self-test configuration comprising a second set of self-test partitions. Each self-test partition within the second set comprising at least one self-test cell. Functional components of the self-test cell(s) of each self-test partition within the second set are arranged to be configured into at least one scan-chain for said self-test partition when the IC device is configured into the second self-test configuration.