System and method for pattern correction in e-beam lithography
US9529959B2 · kind B2 · utility
22Cited by
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17Claims
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Key dates
| Filing date | Feb 27, 2014 |
| Grant date | Dec 27, 2016 |
| Priority date | — |
| Expiry date | Mar 26, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/31764
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a method for pattern correction for electron-beam (e-beam) lithography. In accordance with some embodiments, the method includes splitting a plurality of patterns into a plurality of pattern types; performing model fittings to determine a plurality of models for the plurality of pattern types respectively; and performing a pattern correction to an integrated circuit (IC) layout using the plurality of models.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.