Data alignment device
US9530472B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2016 |
| Grant date | Dec 27, 2016 |
| Priority date | — |
| Expiry date | Jun 1, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/222
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data alignment device includes a buffer configured to buffer a data strobe signal, output a data strobe pulse signal, and buffer inputted data, a latch configured to latch the data in correspondence to the data strobe pulse signal, a first delay configured to delay the data strobe pulse signal and output a delayed signal, a divider configured to divide the delayed signal at a time of activation of a division control signal and generate a plurality of divided signals, a control circuit configured to receive a command signal, a clock, the data strobe signal, and the plurality of divided signals, and control the division control signal for controlling an enable state of the divider, and an alignment circuit configured to align output data in correspondence to the plurality of divided signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.