Methods and apparatuses for multiple concurrent sub-threshold voltage domains for optimal power per given performance
US9531385B2 · kind B2 · utility
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17Claims
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Key dates
| Filing date | Oct 9, 2014 |
| Grant date | Dec 27, 2016 |
| Priority date | — |
| Expiry date | Dec 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1774
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and flow for implementing an ASIC using sub-threshold technology with optimized selection of voltage and process for a given application performance. An embodiment may also implement concurrently used multiple voltage domains inside a single place and route block. The voltage domain is dynamically changed between the cells at the placement time based on the timing path requirements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.