Patent · US Active

Instruction to cancel outstanding cache prefetches

US9535696B1 · kind B1 · utility

9Cited by
5References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 4, 2016
Grant dateJan 3, 2017
Priority date
Expiry dateJan 4, 2036

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/6026
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Techniques relate to handling outstanding cache miss prefetches. A processor pipeline recognizes that a prefetch canceling instruction is being executed. In response to recognizing that the prefetch canceling instruction is being executed, all outstanding prefetches are evaluated according to a criterion as set forth by the prefetch canceling instruction in order to select qualified prefetches. In response to evaluating, a cache subsystem is communicated with to cause canceling of the qualified prefetches that fit the criterion. In response to successful canceling of the qualified prefetches, a local cache is prevented from being updated from the qualified prefetches.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.