Maged M. Michael
124Patents
12h-index
49Co-inventors
86Inventor score
Filing activity: Mar 31, 1999 → Apr 10, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8539486B2 | Transactional block conflict resolution based on the determination of executing threads in parallel or in serial mode | Physics | 59 | Active |
| US6628615B1 | Two level virtual channels | Electricity | 56 | Expired |
| US9696928B2 | Memory transaction having implicit ordering effects | Physics | 38 | Active |
| US6826651B2 | State-based allocation and replacement for improved hit ratio in directory caches | Physics | 23 | Expired |
| US9298626B2 | Managing high-conflict cache lines in transactional memory computing environments | Physics | 23 | Active |
| US9146774B2 | Coalescing memory transactions | Physics | 21 | Active |
| US9158573B2 | Dynamic predictor for coalescing memory transactions | Physics | 21 | Active |
| US9262207B2 | Using the transaction-begin instruction to manage transactional aborts in transactional memory computing environments | Physics | 20 | Active |
| US9619383B2 | Dynamic predictor for coalescing memory transactions | Physics | 18 | Active |
| US9262206B2 | Using the transaction-begin instruction to manage transactional aborts in transactional memory computing environments | Physics | 17 | Active |
| US6338123B2 | Complete and concise remote (CCR) directory | Physics | 15 | Expired |
| US9336047B2 | Prefetching of discontiguous storage locations in anticipation of transactional execution | Physics | 13 | Active |
| US9086974B2 | Centralized management of high-contention cache lines in multi-processor computing environments | Physics | 11 | Active |
| US6405292B1 | Split pending buffer with concurrent access of requests and responses to fully associative and indexed components | Physics | 10 | Expired |
| US9244781B2 | Salvaging hardware transactions | Physics | 10 | Active |
| US9430276B2 | Coalescing memory transactions | Physics | 9 | Active |
| US9348643B2 | Prefetching of discontiguous storage locations as part of transactional execution | Physics | 9 | Active |
| US9535696B1 | Instruction to cancel outstanding cache prefetches | Physics | 9 | Active |
| US9244782B2 | Salvaging hardware transactions | Physics | 9 | Active |
| US9846593B2 | Predicting the length of a transaction | Physics | 9 | Active |
| US9740616B2 | Multi-granular cache management in multi-processor computing environments | Physics | 8 | Active |
| US9348523B2 | Code optimization to enable and disable coalescing of memory transactions | Physics | 8 | Active |
| US9329946B2 | Salvaging hardware transactions | Physics | 8 | Active |
| US9336097B2 | Salvaging hardware transactions | Physics | 8 | Active |
| US9471371B2 | Dynamic prediction of concurrent hardware transactions resource requirements and allocation | Physics | 8 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.