Semiconductor device including built-in crack-arresting film structure
US9536853B2 · kind B2 · utility
3Cited by
5References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 18, 2014 |
| Grant date | Jan 3, 2017 |
| Priority date | — |
| Expiry date | Nov 18, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P80/30
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to at least one embodiment of the present invention, a wafer-to-wafer semiconductor device includes a first wafer substrate having a first bonding layer formed on a first bulk substrate layer. A second wafer substrate includes a second bonding layer formed on a second bulk substrate layer. The second bonding layer is bonded to the first bonding layer to define a bonding interface. At least one of the first wafer substrate and the second wafer substrate includes a crack-arresting film layer configured to increase a bonding energy of the bonding interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.