Semiconductor structure including a ferroelectric transistor and method for the formation thereof

US9536992B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Ralf van Bentum · Radebeul, DE
• Jongsin Yun · Austin, US
• Seunghwan Seo · Dresden, DE
• Joerg Schmid · Dresden, DE

Key dates

• Filing date: Feb 11, 2016
• Grant date: Jan 3, 2017
• Expiry date: Feb 11, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0177
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method includes providing a semiconductor structure. The semiconductor structure includes a first transistor region, a second transistor region and a silicon dioxide layer on the first transistor region and the second transistor region. A layer of a high-k dielectric material is deposited on the silicon dioxide layer. A layer of a first metal is formed over the second transistor region. The layer of first metal does not cover the first transistor region. After the formation of the layer of the first metal, a layer of a second metal is deposited over the first transistor region and the second transistor region. A first annealing process is performed. The first annealing process initiates a scavenging reaction between the second metal and silicon dioxide from a portion of the silicon dioxide layer on the first transistor region. After the annealing process, a ferroelectric transistor dielectric is formed over the first transistor region.