System and method for generating vias in an electronic design by automatically using a hovering cursor indication
US9542084B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 21, 2015 |
| Grant date | Jan 10, 2017 |
| Priority date | — |
| Expiry date | Mar 6, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/394
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a computer-implemented method for electronic design automation. The method may include providing, using one or more computing devices, an electronic design. The method may further include receiving an indication that a cursor is hovering over an overlap associated with the electronic design and in response to receiving the indication, computing one or more via parameters, based upon, at least in part, a topology associated with the overlap. The method may also include displaying, at a graphical user interface, a potential via and allowing, at the graphical user interface, adjustments to the one or more via parameters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.