Gerard Tarroux
16Patents
8h-index
29Co-inventors
72Inventor score
Filing activity: Dec 21, 1994 → Jun 30, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5537580A | Integrated circuit fabrication using state machine extraction from behavioral hardware description language | Physics | 169 | Expired |
| US5805462A | Automatic synthesis of integrated circuits employing boolean decomposition | Physics | 68 | Expired |
| US7555739B1 | Method and apparatus for maintaining synchronization between layout clones | Physics | 35 | Active |
| US9092586B1 | Version management mechanism for fluid guard ring PCells | Physics | 17 | Active |
| US8347261B2 | Method and system for implementing graphically editable parameterized cells | Physics | 16 | Active |
| US8527934B2 | Method and system for implementing graphically editable parameterized cells | Physics | 15 | Active |
| US6397370B1 | Method and system for breaking complex Boolean networks | Physics | 11 | Expired |
| US9208273B1 | Methods, systems, and articles of manufacture for implementing clone design components in an electronic design | Physics | 11 | Active |
| US9761204B1 | System and method for accelerated graphic rendering of design layout having variously sized geometric objects | Physics | 8 | Active |
| US9842183B1 | Methods and systems for enabling concurrent editing of electronic circuit layouts | Physics | 7 | Active |
| US9684748B1 | System and method for identifying an electrical short in an electronic design | Physics | 4 | Active |
| US9773082B1 | Circuit design employing stamp patterns | Physics | 4 | Active |
| US9542084B1 | System and method for generating vias in an electronic design by automatically using a hovering cursor indication | Physics | 4 | Active |
| US10671793B1 | Editing of layout designs for fixing DRC violations | Physics | 2 | Active |
| US10922469B1 | Methods and systems of enabling concurrent editing of hierarchical electronic circuit layouts | Physics | 2 | Active |
| US10783312B1 | Methods, systems, and computer program product for determining layout equivalence for a multi-fabric electronic design | Physics | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.