Patent · US Active

System and method for performing hardware prefetch tablewalks having lowest tablewalk priority

US9542332B2 · kind B2 · utility

3Cited by
4References
20Claims
0Family size

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Key dates

Filing dateNov 13, 2014
Grant dateJan 10, 2017
Priority date
Expiry dateFeb 10, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/654
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A hardware prefetch tablewalk system for a microprocessor including a tablewalk engine that is configured to perform hardware prefetch tablewalk operations without blocking software-based tablewalk operations. Tablewalk requests include a priority value, in which the tablewalk engine is configured to compare priorities of requests in which a higher priority request may terminate a current tablewalk operation. Hardware prefetch tablewalk requests having the lowest possible priority so that they do not bump higher priority tablewalk operations and are bumped by higher priority tablewalk requests. The priority values may be in the form of age values indicative of relative ages of operations being performed. The microprocessor may include a hardware prefetch engine that performs boundless hardware prefetch pattern detection that is not limited by page boundaries to provide the hardware prefetch tablewalk requests.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.