Semiconductor packages and methods of forming the same
US9543170B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2014 |
| Grant date | Jan 10, 2017 |
| Priority date | — |
| Expiry date | Aug 22, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure include semiconductor packages and methods of forming the same. An embodiment is a method including forming a first die package, the first die package including a first die, a first electrical connector, and a first redistribution layer, the first redistribution layer being coupled to the first die and the first electrical connector, forming an underfill over the first die package, patterning the underfill to have an opening to expose a portion of the first electrical connector, and bonding a second die package to the first die package with a bonding structure, the bonding structure being coupled to the first electrical connector in the opening of the underfill.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.