Hybrid package transmission line circuits

US9543244B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Chung Peng Jackson Kong · George Town, MY
• Chang-Tsung Fu · Hillsboro, US
• Telesphor Kamgaing · Chandler, US
• Chan Kim Lee · Bayan Lepas, MY
• Ping Ping Ooi · Butterworth, MY

Key dates

• Filing date: Nov 17, 2014
• Grant date: Jan 10, 2017
• Expiry date: Feb 3, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2224/16
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

“Hybrid” transmission line circuits employing multiple interconnect levels for the propagation, or return, of a single signal line across a package length are described. In package transmission line circuit embodiments, a signal line employs co-located traces in two different interconnect levels that are electrically coupled together. In further embodiments, a reference plane is provided above, below or co-planar with at least one of the co-locate traces. In embodiments, a balanced signal line pair includes first and second co-located traces in two adjacent interconnect levels as a propagation signal line and third and fourth co-located traces in the two adjacent interconnect levels as a return signal line with a ground plane co-planar with, and/or above and/or below the two adjacent interconnect levels.