I/O memory management unit providing self invalidated mapping
US9547603B2 · kind B2 · utility
2Cited by
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19Claims
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Key dates
| Filing date | Aug 28, 2013 |
| Grant date | Jan 17, 2017 |
| Priority date | — |
| Expiry date | Feb 15, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory management unit for I/O devices uses page table entries to translate virtual addresses to physical addresses. The page table entries include removal rules allowing the I/O memory management unit to delete page table entries without CPU involvement significantly reducing the CPU overhead involved in virtualized I/O data transactions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.