Invariant code optimization in high-level FPGA synthesis
US9547738B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2014 |
| Grant date | Jan 17, 2017 |
| Priority date | — |
| Expiry date | May 8, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of programming or configuring an integrated circuit device using a high-level language includes parsing a logic flow to be embodied in the integrated circuit device to identify invariant logic flow, converting the invariant logic flow into separate instruction blocks, incorporating the separate instruction blocks into a high-level language representation of a configuration of resources of the integrated circuit device, and compiling the high-level language representation to configure said integrated circuit device. The high-level language representation can be executed to generate a configuration bitstream for the programmable integrated circuit device, or can be run on a processor on the programmable integrated circuit device to instantiate the configuration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.