Boost control to improve SRAM write operation
US9548104B1 · kind B1 · utility
14Cited by
19References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2015 |
| Grant date | Jan 17, 2017 |
| Priority date | — |
| Expiry date | Jun 30, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Approaches for providing write-assist boost for a Static Random Access Memory (SRAM) array are provided. A circuit includes a write driver of a Static Random Access Memory (SRAM) array. The circuit also includes a boost circuit that dynamically varies a write-assist boost voltage based on a stability assist setting applied to a wordline of the array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.