Venkatraghavan Bringivijayaraghavan
58Patents
9h-index
40Co-inventors
78Inventor score
Filing activity: Oct 10, 2002 → Aug 30, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7969813B2 | Write command and write data timing circuit and methods for timing the same | Physics | 33 | Active |
| US8509011B2 | Command paths, apparatuses, memories, and methods for providing internal commands to a data path | Electricity | 30 | Active |
| US8441888B2 | Write command and write data timing circuit and methods for timing the same | Physics | 26 | Active |
| US8644096B2 | Command paths, apparatuses, memories, and methods for providing internal commands to a data path | Electricity | 24 | Active |
| US9236116B1 | Memory cells with read access schemes | Physics | 19 | Active |
| US6965263B2 | Bulk node biasing method and apparatus | Electricity | 18 | Expired |
| US9570156B1 | Data aware write scheme for SRAM | Physics | 17 | Active |
| US9548104B1 | Boost control to improve SRAM write operation | Physics | 14 | Active |
| US7245548B2 | Techniques for reducing leakage current in memory devices | Physics | 12 | Expired |
| US8984320B2 | Command paths, apparatuses and methods for providing a command to a data block | Physics | 7 | Active |
| US9281045B1 | Refresh hidden eDRAM memory | Physics | 5 | Active |
| US7511534B1 | Circuits, devices, systems, and methods of operation for a linear output driver | Electricity | 5 | Active |
| US9251890B1 | Bias temperature instability state detection and correction | Physics | 5 | Active |
| US9208859B1 | Low power static random access memory (SRAM) read data path | Physics | 4 | Active |
| US11024347B2 | Multiple sense amplifier and data path-based pseudo dual port SRAM | Physics | 4 | Active |
| US9881669B1 | Wordline driver with integrated voltage level shift function | Physics | 4 | Active |
| US9111599B1 | Memory device | Physics | 4 | Active |
| US9157960B2 | Through-substrate via (TSV) testing | Electricity | 4 | Active |
| US8767483B2 | Apparatus and methods having majority bit detection | Electricity | 4 | Active |
| US9570155B2 | Circuit to improve SRAM stability | Physics | 3 | Active |
| US9390769B1 | Sense amplifiers and multiplexed latches | Electricity | 3 | Active |
| US9405468B2 | Stacked memory device control | Emerging Cross-Sectional Technologies | 3 | Active |
| US10395700B1 | Integrated level translator | Physics | 3 | Active |
| US8064269B2 | Apparatus and methods having majority bit detection | Electricity | 2 | Active |
| US9761285B1 | Sense amplifier and latching scheme | Physics | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.