Protection of memories, datapath and pipeline registers, and other storage elements by distributed delayed detection and correction of soft errors
US9557936B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2014 |
| Grant date | Jan 31, 2017 |
| Priority date | — |
| Expiry date | Feb 21, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1048
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This invention is data processing apparatus and method. Data is protecting from corruption using an error correction code by generating an error correction code corresponding to the data. In this invention the data and the corresponding error correction code are carried forward to another set of registers without regenerating the error correction code or using the error correction code for error detection or correction. Only later are error correction detection and correction actions taken. The differing data/error correction code registers may be in differing pipeline phases in the data processing apparatus. This invention forwards the error correction code with the data through the entire datapath that carries the data. This invention provides error protection to the whole datapath without requiring extensive hardware or additional time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.